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Displaying the 2 most recent scholarly works from 2 for Partha De.
Path-balanced logic design to realize block ciphers resistant to power and timing attacks
P De, C Mandal, U Prampalli
Journal article | 2019 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems
In this paper, binary decision diagram (BDD)-based dual-rail precharge logic circuit schemes have been developed to counter differ..
Computing and Information Systems