Journal article

Characteristics of a ‘harp’ signal processor with analog memory operated with segmented silicon detectors

F Anghinolfi, P Aspell, M Campbell, P Jarron, EHM Heijne, JC Santiard, H Verweij, R Bonino, AG Clark, H Kambara, X Wu, K Borer, D Campbell, P Murray, C Gcssllng, B Lisowski, GF Moorhead, GN Taylor, J Teiger, A Weidberg

IEEE Transactions on Nuclear Science | Published : 1994


A 32 channel analog VLSI detector readout chip (HARP32) with an input charge preamplifier, a 64-cell current integrating analog memory in each channel and a common analog multiplexer, has been used in a test beam with segmented silicon detectors. The device was operated at the LHC clock speed of 66 MHz. The different pedestal variations seen at the output are analyzed: the input noise σnamounts to 2.8mV r.m.s., the pedestal non uniformity in channel σped to 1.2m V r.m.s., the channel to channel pedestal variation σch to 4.0mV r.m.s., and an output baseline shift σobs of 3.5mV r.m.s has been observed. © 1994 IEEE

University of Melbourne Researchers

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