Conference Proceedings

A New XOR-Based Content Addressable Memory Architecture

Luca Frontini, Seyedruhollah Shojaii, Alberto Stabile, Valentino Liberali

2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS) | IEEE | Published : 2012

Abstract

In this paper we describe a Content Addressable Memory (CAM) architecture based on a new custom cell, called XORAM. The cell is composed by two main blocks: a 6T-SRAM, and a 4T-XOR logic gate. Each XORAM cell compares the input data on the bit line with the data stored in the 6T-SRAM cell. The output matching bit is obtained by performing a NOR operation between all bits of the XORAM cells storing the word. The proposed architecture is based on a fully-CMOS combinational logic, and it does nor require any precharge operation or control and timing logic. A compact full-custom layout has been designed for a memory organized in 18-bit words, to reduce both area and power consumption. Compared w..

View full abstract

University of Melbourne Researchers