CMOS IC radiation hardening by design
Alessandra Camplani, Seyedruhollah Shojaii, Hitesh Shrimali, Alberto Stabile, Valentino Liberali
Facta universitatis - series: Electronics and Energetics | National Library of Serbia | Published : 2014
Design techniques for radiation hardening of integrated circuits in commercial CMOS technologies are presented. Circuits designed with the proposed approaches are more tolerant to both total dose and to single event effects. The main drawback of the techniques for radiation hardening by design is the increase of silicon area, compared with a conventional design.