Journal article

Investigation of radiation effects and hardening procedures for CMOS/SOS

JL Peel, RK Pancholy, GJ Kuhlmann, TJ Oki, RA Williams

IEEE Transactions on Nuclear Science | Published : 1975


Ionizing radiation effects and hardening procedures have been investigated using simple CMOS/SOS circuits fabricated with Si02 gate insulators. A modified gate oxidation process using steam and HC ℓ has resulted in improved gate oxide hardness-with threshold voltage shifts of less than two volts up to a total dose of 106 rads(Si). Radiation-induced n-channel leakage currents were reduced by more than two orders of magnitude by using a deep boron ion implant and appropriate processing techniques. Post-irradiation values of less than 0.5μA/mil have been obtained using this procedure. Studies of charge buildup at the silicon-sapphire interface indicate an effective positive charge in the range ..

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