A 60-GHZ variable delay line on CMOS for steerable antennae in wireless communication systems
CM Ta, E Skafidas, RJ Evans, CD Hoang
Canadian Conference on Electrical and Computer Engineering | Published : 2008
A variable delay line (VDL) is designed on a 130-nm CMOS process. Post-layout simulation results show that the VDL has a phase tuning range of 100 degrees at 60 GHz. It exhibits a wideband matching to 50-Ohm terminations from 20 GHz up to exceeding 80 GHz. The group delay variation is less than 4 ps within a bandwidth of 10 GHz. At its maximum phase shift, the VDL introduces a loss of 6 dB. The design features a small footprint of 430 μm × 220 μm and can be easily extended to provide wider phase tuning range. © 2008 IEEE.