Journal article
Atomistic modeling of metallic nanowires in silicon
H Ryu, S Lee, B Weber, S Mahapatra, LCL Hollenberg, MY Simmons, G Klimeck
Nanoscale | ROYAL SOC CHEMISTRY | Published : 2013
DOI: 10.1039/c3nr01796f
Abstract
Scanning tunneling microscope (STM) lithography has recently demonstrated the ultimate in device scaling with buried, conducting nanowires just a few atoms wide and the realization of single atom transistors, where a single P atom has been placed inside a transistor architecture with atomic precision accuracy. Despite the dimensions of the critical parts of these devices being defined by a small number of P atoms, the device electronic properties are influenced by the surrounding 104 to 106 Si atoms. Such effects are hard to capture with most modeling approaches, and prior to this work no theory existed that could explore the realistic size of the complete device in which both dopant disorde..
View full abstractGrants
Awarded by US National Science Foundation (NSF)
Awarded by US NSF
Awarded by US Army Research Office
Awarded by Australian Research Council (ARC) Centre of Excellence for Quantum Computation and Communication Technology
Awarded by Ministry of Education, Science and Technology, Republic of Korea
Funding Acknowledgements
This research was conducted by the http://www.nanoHUB.org computing resources operated by the Network for Computational Nanotechnology funded by the US National Science Foundation (NSF) (EEC-0228390), and the financial support from the US NSF (OCI-0749140), the US Army Research Office (W911NF-08-1-0527), and the Australian Research Council (ARC) Centre of Excellence for Quantum Computation and Communication Technology (CE11 0001027). H. Ryu, S. Lee and G. Klimeck acknowledge the extensive use of computing resources provided by the TeraGrid computing resources supported by the National Institute for Computational Sciences, and the Texas Advanced Computing Center. H. Ryu acknowledges the extensive use of TACHYON-II clusters supported by the National Institute of Supercomputing and Networking, Korea Institute of Science and Technology Information, and the support from the EDucation-research Integration through Simulation On the Net (EDISON) project funded by the Ministry of Education, Science and Technology, Republic of Korea (Grant no.: 2011-0020576). M. Y. Simmons acknowledges an ARC Federation Fellowship and support from the US Semiconductor Research Corporation.