Conference Proceedings

Design of 120:1 frequency divider for a 12.6 GHz phase-locked loop

HT Duong, N Tran, AT Huynh, HV Le, E Skafidas

2014 1st Australian Microwave Symposium (AMS) | IEEE | Published : 2014

DOI: 10.1109/AUSMS.2014.7017352

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Keywords

Frequency Measurement
Microwave Integrated Circuits
Noise Measurement
Frequency Conversion
Frequency Divider
Cmos Process
Cmos Analogue Integrated Circuits
Cml
Divider Circuit
Cmos Integrated Circuits
Phase-Locked Loop
Phase Locked Loops
Science & Technology
Frequency Dividers
Cmos
Frequency 8.3 Ghz To 13.9 Ghz
Cml Divider
Analog Common Mode Logic Divider
Pll
Phase Measurement
Size 65 Nm
Digital Frequency Divider
Technology
Engineering
Engineering, Electrical & Electronic
Phase Noise